I am a little confounded by the relationship between multiplicity in ports and multiplicity in connectors, inside a composite structure diagram.
Let's suppose we have a device like this:
And its composite structure diagram:
So far, so good. Now, suppose I want to take advantage form the fact that ports pact1 and pact2 are of the same type; ditto for pcpu1, pcpu2. I think I can model itlike this:
And the composite structure diagram:
Now, how can I be sure that the latter diagram means the same as the first composite structure diagram, and not this one?:
Or is this not equivalent because of some restrictions derived from the multiplicity (1) of the end associations?
In other words, I think I know how multiplicity works with associations between classes (and parts) without ports, but I am not sure how it works with ports. Can someone point to the correct rules?
I've seen complicated examples in Internal Block Diagrams (A Practical Guide to SysML, by Friedenthal and others) that I don't fully understand, because no clear (to me) rule is formulated.
The above examples are the simplest ones I cannot fully elucidate. I have more complicated examples for the adventurer who dares to offer me a good response.