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Messages - avi10000

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1
General Board / screens locked
« on: August 07, 2024, 11:36:39 pm »
Hi, I have found that many diagrams that I myself created and populated have become locked.
SOS  !!!

2
Hi Paolo -- Thank you for your quick response. 

I totally agree with you on your notation observation.

The format was what I saw on the sketch (repeated many times) that the product manager gave me. And in my country everybody loves abbreviations...  I will pass on the remark. I am just the dumb modeler - not a product manager or sys architect.

So I hereby correct the syntax accordingly:

  rate = 1G/s - next to the connector line

And I still have the same question, as you point out.

Thank you

3
Hi all,

I have an IBD diagram modeling a HW set up containing two blocks. Each block has a port.

The two ports (one from each block) are connected by a connector.

I want to show the specified data rate of the data flowing along the connector. E.g., maybe something like this:

  rate = 1G next to the connector line

Is there a customary & agreed annotation of the connector (something like a tag adding labeling to the connector) for this that is followed by system architects?


(I posted this on another forum and got no answer. So I am deleting it from there.)
 
Thanks
Avi

4
Thanks for the response, PDC.

Btw, I forgot to point out (the obvious) that the sketch I received is of the HW aspect only of the system.

Quote
i. use full ports, but simply ignore (or neglect to specify) the internal structure & behaviour of the port

Also, the sketch I have (so far ...) is just a structure (static) diagram. No behaviors to model yet (relevant to activity diagrams or sequence diagrams).

Looks like I will be going with the full port approach. A full port and also nesting will be a new experience for me.

Quote
But please don't go the direction that I've seen one customer go with by demanding one Port per signal in the interface(!).

Wow...

Assuming a signal is an app output, in my case that would be dozens; if it's an information item, that would be 1000s. So it would not have occurred to me to make a separate port for each signal.
 

6
Btw, should I have posted this question under the UML Processes board?
If so, how can it be moved?

7
Thanks for the response, PDC.
 
> it might depend on whether or not you are bothered about the internal structure and behavoiur of the ethernet switch itself.

Not bothered at all about internal struct & behav of the switch itself. So modeling the switch as a full port is good (- better than I expected).

Just that the switch connects with several external devices. So is that still ok to make the switch a full port?
I think yes, coz I can make the switch a 'nesting port' (*1), as well as full port, where it contains the right number of nested ports.

That's good?

Note:
*1 - I just made up the term.

Edit: I added the note.
 


8
Is this an EA add-on?

(Wrt to a Windows utility I'm not at all sure that my company IT will like anybody installing such a utility.)

Edit:
Fixed grammar

9
>  I once used the diagram guid and an add-in to navigate.

Can you recommend a good add-in for this ?

(I remember that years ago I was an ardent use of a certain windows-os control & catch tool. For some reason I stopped using or needing it and no longer remember it's name.)

Edited:
reworded "use" to "user"

10
Thanks to shimon, querty for the answers.

> While the above will work it will also mess up your file system.
Symptoms?
Messes up the system 100% every time? Or is there a failure rate?

shimon, you have any comment on the above experience?

11
Hi all,

Excuse me for asking a non-EA-specific question here, but I wasn't getting answers anyway else.

SysML: I want to model an Ethernet switch that is part of a computer board (comprising a CPU and additional HW components).

Is the most appropriate approach, to model the Ethernet switch itself as a full port (on a side of the board) ?

Or alternatively should the Ethernet switch be a regular block, and its physical ports / interfaces should be full ports?

Other ... ?

Thanks
Avi

12
> You can change the diagram type from Design | Diagram | Options | Change type

Thank you for the response and for giving a full path.



13
Hi all,
Can I get EA to convert a UML composite structure diagram to a SysML IBD diagram?

Thanks
Avi

14
Hi,
I want to be able to obtain a link/path to an EA element or diagram and save it an external file, e.g., Word file that I am also working with,...

... such that I can click the link in Word so it opens the EA app and puts focus on the specified element in the Project Browser and/or opens the specified diagram.

I have heard there is a way to create "shortcut files". What are these and will they help me for my need?

Thanks
Avi

15
General Board / Re: Diagram frames in UML ?
« on: July 04, 2024, 09:30:31 pm »
Thanks for the response, Geert.
Yes, I know.
So I will correct the way I phrased it ... I meant to say:

Since the EA tool does not seem to display a diagram frame

(where the frame should, imo, contain name + kind of the entity, an aspect of which the diagram is describing)

and thus leaves the modeler (and readers) with less than maximum awareness of the identity of the element,
 
and thus, imo, EA tends to reduce somewhat the expression & gen. support it provides for MBSE, and might therefore cause the modeler to relate to the diagram just as "a diagram" rather than what it is supposed to be -- a visual representation of an aspect of the entity in the model DB (e.g., the entity's structure, it's internal behavior, and more).

(By now, my question seems to have lost most of its importance...   :D
 

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