This webinar has completed, the recording will be posted shortly.

Overview

Learn how to simulate SysML using the OMG SysPhS specification that supports simulating models in both OpenModelica and Mathworks' Simulink.

In this webinar we examine the construction and simulation of a common digital electronic circuit - a flip-flop counter - used for halving a digital clock's output frequency. All the runtime variables are defined in the Enterprise Architect model using SysPhS, ensuring that it can be simulated and viewed in both OpenModelica or Simulink.

In this webinar, you will learn how Enterprise Architect can be used to:

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Session 1

Melbourne Tue 28 July 08:00 am
New York Mon 27 July 18:00 pm
Los Angeles Mon 27 July 15:00 pm
London Mon 27 July 23:00 pm
Singapore Tue 28 July 06:00 am

Session 2

Presenters

Dermot O'BryanSparx Systems
Scott HebbardSparx Systems

Explore the webinar resources

Example Model: sysphs-digital-example.eap Download links

Questions & Answers

This webinar was conducted using the Enterprise Architect 15.2 Beta.

Please visit the following for more information:
Enterpise Architect 15.2 landing page
In the example model supplied with this webinar there are two models:
  • the digital Flip-flop model
  • an analogue Operational Amplifier model (OpAmp)
For the analogue model, there is a video covering this on the 15.2 beta page:
Using SysPhS for model based simulation
The primary flow is from a SysML model as part of an MBSE design. So the flow is from the model to the plot. However, in theory, a reversal using Enterprise Architect’s grammar parser could be used. It may be considered as an option in the future.
No. The code generated is compatible with the Modelica standard and should work with any client application that supports Modelica directly. We have briefly tried this with Dymola and Wolfram SystemModeler and these both appear to be compatible.
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