Help: Ports and Interfaces 2

[StevePinfold]

Hi All

I wanted to tap in on all of your experience as I can't find the correct way to model a particular issue ... thanks in advance for reading.

I have a system with a number of I/O lines (signal A, signal B etc) and a multi-port I/O card (Port A:0 - 7, Port B: 0-7 etc) and I am working in the component model.

I wish to generate a diagram which allows me to create an I/O card component and then add each bit of each port. I then wish to link each signal to a specific I/O Port, for example

 Port A Bit 3 - Signal A
 Port B Bit 2 - Signal B

I can draw the diagram and feel happy with this, but when I generate the document I would like to see a table somewhere that says

 Port A Bit 0
 Port A Bit 1
 Port A Bit 2
 Port A Bit 3 - Signal A
 ...

 Port B Bit 0
 Port B Bit 1
 Port B Bit 2 - Signal B
 ...

Hence describes my I/O mapping in both diagram and document.

Can anybody reccomend how I achieve this please as I'm running out of ideas of how to achieve this

Thanks

Steve

[qwerty]

You should consider looking into SyML. For the time being you could model the signals via Information Flow conveying according classes representing the signal.

q.